1. Field of the Invention
The present invention relates to a display panel drive device for driving a display panel of a matrix form, such as a plasma display panel.
2. Description of the Related Art
A display panel drive device for transmitting image data represented as digital data in a display device on a line is described in Japanese Patent Application Laid-Open Publication No. Hei-11-95713. In that device, a system (differential serial transmission system) for transmitting the digital signal using the LVDS (Low Voltage Differential Signaling) is used. The transmission system using the LVDS is a system is a system of driving two signal lines symmetrically with opposite phases and transmitting a difference between signals on the two signal lines. Therefore, the transmission system using the LVDS has a feature that foreign noises cancel each other and hardly affect the signal.
In the device described in Japanese Patent Application Laid-Open Publication No. Hei-11-95713, however, only image data and control signals, such as synchronization signals, are transferred by using the LVDS system, whereas a clock signal used on the reception side is transferred via a different transmission line. When such a configuration is adopted, however, there is a fear that skew (timing deviation) between the image data and the clock signal received on the reception side. For example, it is conceivable to provide a delay circuit in a path of a clock signal to adjust timing in order to eliminate the skew. In this case, however, the adjustment work of timing becomes troublesome.
The device described in Japanese Patent Application Laid-Open Publication No. Hei-11-95713 is a display panel drive device for driving a liquid crystal display. For example, as for a configuration suitable for transmitting a signal group comprising address data and driving pulse generation control data required to drive a display panel such as a plasma display panel by using a differential serial transmission system, any proposal has not been made heretofore. In general, when a skew (timing deviation) between the address data and the drive pulse generation control data occurs, it becomes a cause of false operation. Therefore, it is necessary to exclude such a skew. It is conceivable to provide a delay circuit in a path of a clock signal to adjust timing in order to eliminate the skew. In this case, however, the adjustment work of timing becomes troublesome.
In addition, when the number of transmitted signals increases or the number of transfer destination printed circuit boards becomes plural as the definition of display panels becomes high, then a plurality of sets of LVDS transmitter/receiver become necessary. In such a case, signals received by receivers are transferred via mutually different paths. As a result, a skew (timing deviation) occurs. Therefore, there is a fear that input timing of the drive pulse generation control data to drivers located after the receivers might deviate and a false operation might occur.
When reading image data or the like from a memory and transmitting it by using such a conventional technique, the clock used to read out the image data from the memory and the clock used in the transmission system using LVDS have the same frequency or frequencies mutually related with an integer ratio. In some cases, therefore, both the clock used in operation of reading out image data from the memory and the clock used in transmission using LVDS or used in operation conducted in a transmission destination circuit cannot be set respectively equal to an optimum clock frequency.